Location – Santa Clara, CA – Locals Needed
Contract
Minimum Qualifications
The ideal candidate should have MS in Electrical Engineering with 8+ years of experience in SerDes / Micro-controller / High Speed Digital Development.
• Hands on design experience of digital top ICs that include analog/digital hard IPs, digital soft IPs and custom design blocks
• Experience with Tensilica Xtensa and ARM microcontrollers • Experience in designing SerDes blocks like link training/adaptation/calibration, CDR, DSP based equalizers • Experience of digital communication protocols like I2C, I3C, SPI, MDIO, UART, JTAG, etc.
• Able to actively participate during various phases of the ASIC/SOC design process –Architecture, RTL design, verification, syntheses, P&R and STA.
Thanks
Yogesh Sharma K,
Reveille Technologies, Inc
