Role: FPGA Verification Engineer
Location: Santa Clara, CA (Onsite)
Duration: Contract
Must Have Skills:
· 8 + Years of in FPGA
· 5 +Years of Exp in UVM
· 5 +Years of Exp in System Verilog
· 3+ years of experience in FPGA verification.
· Experience with scripting languages (e.g., Python, Perl).
· Strong understanding of FPGA design principles and architectures.
Sai Kumar
saikumar@spiceorb.com
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